- two-level cache architecture
- двухуровневая архитектура кэш-памяти
The New English-Russian Dictionary of Radio-electronics. F.V Lisovsky . 2005.
two-level cache architecture
Смотреть что такое "two-level cache architecture" в других словарях:
Architecture De Processeur — Une architecture externe de processeur[1],[2] ou architecture de jeu d instructions[3] (ISA, de l anglais instruction set architecture), ou tout simplement architecture (de processeur) … Wikipédia en Français
Architecture des processeurs — Architecture de processeur Une architecture externe de processeur[1],[2] ou architecture de jeu d instructions[3] (ISA, de l anglais instruction set architecture), ou tout simplement architecture (de processeur) … Wikipédia en Français
CPU cache — Cache memory redirects here. For the general use, see cache. A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the… … Wikipedia
Architecture of Windows NT — The Windows NT operating system family s architecture consists of two layers (user mode and kernel mode), with many different modules within both of these layers. The architecture of Windows NT, a line of operating systems produced and sold by… … Wikipedia
Architecture de processeur — Une architecture externe de processeur[1],[2] ou architecture de jeu d instructions[3] (ISA, de l anglais instruction set architecture), ou tout simplement architecture (de processeur)[4 … Wikipédia en Français
Architecture of Kuala Lumpur — The architecture of Kuala Lumpur is a blend of old colonial influences, Asian traditions, Malay Islamic inspirations, modern and post modern mix. Being a relatively young city, most of Kuala Lumpur s colonial buildings were built toward the end… … Wikipedia
MIPS architecture — MIPS (originally an acronym for Microprocessor without Interlocked Pipeline Stages) is a RISC microprocessor architecture developed by MIPS Technologies. As of|1999|alt=By the late 1990s it was estimated that one in three RISC chips produced were … Wikipedia
Flexible Architecture for Simulation and Testing — The FAST Project is a new hybrid hardware prototyping platform enabled by integrating a variety of hardware components on a printed circuit board (PCB) to implement Chip Multiprocessor (CMP) or Multiprocessor (MP) systems. The Flexible… … Wikipedia
Multithreading (computer architecture) — This article describes hardware supports for multithreads. For thread in software, see Thread (computer science). Multithreading computers have hardware support to efficiently execute multiple threads. These are distinguished from multiprocessing … Wikipedia
Computer architecture — In computer science and engineering, computer architecture is the practical art of selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals and the formal modelling of those systems.… … Wikipedia
Cell architecture — Cell architectureConstituent elements*PPE *SPE *EIB *XDR *FLEX I/OPatents It is well known that IBM holds one of the world s largest patent portfolios. The United States Patent and Trademark Office proclaimed in 2004, For the twelfth consecutive… … Wikipedia
